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AMAZON multi-meters discounts AMAZON oscilloscope discounts Worked Example (1) A boost converter has an input range of 12 V to 15 V, a regulated output of 24 V, and a maximum load current of 2 A. What would be a reasonable goal for its inductance, if the switching frequency is a) 100 kHz, b) 200 kHz, and c) 1 MHz? What is the peak current in each case? And what is the energy-handling requirement? The first thing we have to remember is that for this topology (as for the buck-boost), the worst-case is the lowest end of the input range, since that corresponds to the highest duty cycle and thus the highest average current IL = IO/(1 - D). So for all practical purposes, we can completely disregard VINMAX here - in fact it was a red herring to start with, for this particular analysis! From Tbl. 1, the duty cycle is: = 4 Amperes Let us target a current ripple ratio of 0.4. So IPK = IL = 4.8 Amperes
++ We should remember that r = 0.4 always implies that the peak is 20% higher than the average. So we realize that in effect, the peak current does not depend on the frequency. The inductor must be able to handle this above peak current without saturating. So in this example, we would be fine just picking an inductor rated for 4.8 A (or more), irrespective of frequency. In fact we had previously learned in the section "How Inductance and Inductor Size Depend on Frequency" that the required current rating of an inductor is independent of the frequency (since the peak is unchanged). However, the size does change with frequency, because size is 1/2 × L × IPK2, and L changes as follows. To calculate the inductance corresponding to the chosen value of r, we can use the following equation (presented previously). We also note from Tbl. 1 that VON = VIN for the boost. Therefore for f = 100 kHz L = VON × D For f = 200 kHz, we would get half of this, that is, 18.75 µH. And for f = 1 MHz, we get 3.75 µH. We clearly see that high frequencies lead to smaller inductances. We have previously observed that for a given application, small inductances invariably lead to small inductors. Therefore we conclude that on increasing the switching frequency, we will get smaller-sized inductors too. And that is the basic reason for hiking up switching frequencies in general. The energy-handling requirement, if desired, can be explicitly calculated in each case, by using E = 1 2 × L × IPK2. So far, we have been generally targeting r = 0.4 as an optimum value. Let us now understand all the reasons why this may not be a good choice on occasion. === Tbl. 3: Published current limit specs for the LM2679 Conditions TYP MIN MAX Units Current RCLIM = 5.6 k? Room Temperature 6.3 5.5 7.6 A Limit 'ICLIM' Full Operating 5.3 8.1 Temperature Range ==== Current Limit Considerations in Setting r: We had indicated previously that the current limit may be too low to allow r from being set to its optimum. Now we will also include the impact of the spread in the current limit. So for example, in Tbl. 3 we have the published specifications for the current limit of an integrated "5-A" switcher, the LM2679. To be able to guarantee the specified power output (or load current in this case) unconditionally, we need to guarantee that the peak current in our application never reaches even the lower limit ("MIN") of the published current limit specification. So in fact, in Tbl. 3, we need to disregard all the numbers except for the 'MIN' value - given as 5.3 A. Now, if we are trying to get 5 A out of our converter with an r of 0.4, the estimated peak current will be 1.2×5 = 6 A. Clearly, as mentioned earlier, we are not going to get there with the LM2679! Unless we lower the value of r (increase inductance). Maximum value of r is: Solving, with IO = 5 A, and ICLIM_MIN = 5.3 A, we get We can see from Fgr. 6, that this calls for an energy-handling capability (size of inductor) almost 3× the optimum! Actually, it turns out this part is just specified inappropriately. This part is in reality one with an adjustable current limit. And so we could have probably adjusted the current limit adjust resistor quoted in the electrical tables to allow for a "better" value of current limit, and thereby a better value of r (at maximum rated load). But unfortunately, that is not clarified in the tables. We should always remember that the minimum and maximum limits of the electrical tables are the only parts of a datasheet really guaranteed by any vendor (certainly not the typical values!). So as a matter of fact, any other information in a datasheet just amounts to general design "guidance" - and that includes any 'typical performance curves' provided. A prudent designer would never second-guess the vendor - in this case as to whether the current limit resistor can indeed be adjusted to give us a smaller inductor, or not. Therefore, as it stands, if we are using the LM2679 for a 5-A load current application, we do need an inductor three times larger than the optimum. Note that if the current limit can indeed be adjusted higher, the vendor should have picked the appropriate value for the current limit adjust resistor in the "conditions" column of the electrical table (and stated the limits accordingly). Note also that when we talk of a "5 A buck IC," that implies the part is supposed to deliver 5-A load current. The current limit of course needs to be set (and stated) correctly for the rated load, as discussed above. However, we should be very clear that when we are talking of boost or buck-boost switcher ICs, a "5 A" part For example, does not give us a 5-A load current. That is because the dc inductor current is not equal to IO, but IO/(1 - D) for these topologies. So a "5-A" rating in this case only refers to the current limit of the device. What load current we can derive from a "non-buck" IC depends on our specific application - in particular on the DMAX (duty cycle at VINMIN). For example, if the desired load current is 5 A, and the (maximum) duty cycle in our application is 0.5, then the average inductor current is actually IO/(1 - D) = 10 A. Further, with an r of 0.4, the peak would be 20% higher, that is, 1.2 × 10 = 12 A. So, for an optimum case, we would need to actually look for a device whose minimum current limit is 12 A or more in this case. At the bare minimum, we need a device with a current limit higher than 10 A, just to guarantee output power. Continuous Conduction Mode Considerations in Fixing r: As discussed previously, under various conditions, we may enter discontinuous conduction mode (DCM). From Fgr. 5 we can see that just as DCM starts to occur, the current ripple ratio is 2. However we can pose the question in the following manner - what if we have set the current ripple ratio to a certain value r ' (i.e. the current ripple ratio at the maximum load current ,IO_MAX). And then we decrease the load current slowly - at what load does the converter enter DCM? By simple geometry it can be shown that the transition to DCM will occur at r ' /2 times the maximum load. For example suppose we set r ' to 0.4 at 3 A load, the converter will transition into DCM at (0.4/2) × 3 = 0.6 A. But designers know that when DCM is entered, a lot of things within the converter change suddenly! The duty cycle, for one, will now starting pinching off toward zero as we decrease the load current further. In addition, the loop response of the converter (its ability to correct quickly for disturbances in line and load) also usually gets degraded in DCM. The noise and EMI profile can change suddenly too, and so on. Of course there are some advantages of operating in DCM too, but let us for now assume that for various reasons, the designer wishes to avoid DCM altogether, if possible. Maintaining the converter in CCM, down to the minimum load of our application, enforces a certain maximum value for r '. For example, if the minimum load is IO_MIN = 0.5 A, then to maintain the converter in CCM at 0.5 A, the set current ripple ratio (r ' at 3 A) needs to be lowered. Back calculating, we get the required condition for this [...] We therefore need to set the current ripple ratio to less than 0.333 at maximum load, to ensure CCM at IO_MIN. Note that generally speaking, we can make the converter operate in boundary conduction mode (BCM), or in full DCM, in three ways - a) by decreasing the load, b) choosing a small inductance, or c) increasing the input voltage. We realize that decreasing the load will proportionally decrease IDC to virtually any value, and so the condition r = 2 (BCM to DCM) will certainly occur sooner or later - below a certain load current. Similarly, decreasing L will necessarily increase delta I, and so at some point we can expect the ratio delta I/IDC (i.e. r) to try and become greater than 2 (implying DCM). However, as far as the third method of entering DCM mentioned above, we should realize that solely increasing the input voltage just might not do the trick! DCM or BCM can only happen under an input (line) variation, provided the load current is simultaneously below a certain value to start with (the value being dependent on L). It’s instructive to study the three topologies separately in this regard. Note that the general equation for r is (any topology, any mode). Applying the voltseconds law in CCM (or BCM), we also get (any topology, CCM or BCM only) a) From the plots of r in Fgr. 4, we see that both the buck and the buck-boost have the highest value of r when D approaches zero, i.e. at maximum input voltage. For these topologies, the equation for r (derivable from the more general equation for r just given immediately above) is (Buck-Boost) So putting r = 2 and D = 0 (i.e. highest input voltage plus BCM), we get the limiting condition (Buck and Buck-Boost) Therefore, for these two topologies, if IO is greater than the above limiting value, we will always remain in CCM, no matter how high we increase the input voltage. b) Coming to the boost, the situation is not so obvious. From Fgr. 4, we see that r peaks at D = 0.33 (corresponding to the input being exactly two-thirds of the output). So the boost is most likely to enter DCM at D = 0.33 - not say, at D = 0or D = 1. We can derive the following (exact) equation for r (Boost). So putting D = 0.33, and r = 2 in this equation, we get the following limiting condition IO = 2 (Boost) Therefore, for the boost topology, if IO is greater than this value, we will always remain in CCM, no matter how high we increase the input voltage. Note that, if we do manage to enter DCM, the most likely input point for this to happen is an input of 0.67 times the output. In other words, if we are not in DCM at this particular input voltage, we can be sure we will be in CCM throughout the entire input range (whatever it may be). Setting r to Values Higher Than 0.4 When Using Low-ESR Capacitors: Nowadays, with improvements in capacitor technology, we are seeing a new generation of very 'low-ESR' capacitors - like monolithic multilayer ceramic capacitors ('MLCs' or 'MLCCs'), polymer capacitors, and so on. Due to their extremely low ESRs, these capacitors usually have very high ripple (RMS) current ratings. Therefore, the required size of such capacitors in any application is no longer dictated by their ripple current handling capability. In addition, these capacitors also have almost no ageing characteristics (or lifetime issues) that we need to account for beforehand in the design (as we customarily do for electrolytic capacitors - that can "dry out" over time). Further, due to their very high dielectric constant, these new capacitors have also become very small in size. So in fact nowadays, increasing r may not necessarily cause a noticeable increase in the space occupied by the capacitors (or size of converter). On the other hand, increasing r may still lead to a relatively significant reduction in size of the inductor. Summing up, with modern capacitors to the rescue, it may start making perfect sense to increase r from its traditional "optimum" of 0.4, to say around 0.6 to 1 on occasion (provided other considerations don’t restrict this). If we do so, Fgr. 6 tells us, we can still get an additional 30 to 50% reduction in the size of the inductor. And that is certainly not insignificant, provided of course that that advantage is not offset by having to use larger capacitors in the bargain! Fgr. 8: The 'Initial Current Limit' of the Topswitch. Setting r to Avoid Device "Eccentricities": Surprisingly, device eccentricities may on occasion play a part in defining the limits of r too. For example in Fgr. 8 we have presented the current limit plot of an integrated high-voltage flyback switcher IC called the "Topswitch." On it we have superimposed a typical switch current waveform, just to make things a little clearer. We see that surprisingly, the current limit of this device is time-dependent for about 1.5 µs after the turn-on transition - something we don't intuitively ever expect. This 'initial current limit' of the device occurs just as its internal current limit comparator starts to come out of its (valid) 'leading edge blanking' time. As mentioned, during this blanking time the IC is just "not looking" at the current at all to avoid spurious triggering on the noise edge of the turn-on transition. But the problem is that once the current limit circuit gets down to monitoring the switch current again, it takes a certain time for the current limit threshold to settle down - and during this time it can be triggered at only about 75% of the supposed current limit! Looking at the switch (or inductor) current waveform, we know that the current at the moment the switch turns ON is always less than the average value by the amount delta I/2. In other words this trough (valley) current 'ITR' is related to r according to the equation .... We realize that to avoid hitting the initial current limit of the device, we need to ensure that the trough falls below 0.75 × ICLIM. So.... Now, we are assuming the power supply is at maximum load in this analysis. Therefore, the peak current is set equal to the current limit ICLIM .... Therefore equating the two equations above, we get the limiting condition for r ... Since r in any case is typically set to about 0.4, we should normally have no trouble with this "initial current limit" issue. However, note that on finer examination of the electrical tables of the datasheet, this 0.75 × factor is specified only at 25fic. Unfortunately, very few power devices stay at 25fic for long! So, the bottom line is that, we, as designers, don’t really know the value of the current limit as the device heats up. Yes, we can certainly make an educated guess, possibly leave an additional safety margin when fixing r, and certainly, we may face no problem whatsoever. But the truth is we are on our own now - the vendor has not provided the requisite data (in the form of guaranteed limits within the electrical tables). Fgr. 9: The Pulse Width Modulator Section of a Power Converter Setting r to Avoid Sub-harmonic Oscillations: Looking at Fgr. 9, we see that in any converter, the output voltage is first compared against an internal reference voltage. Then, the difference between the two (the 'error') is filtered, amplified, and inverted by an 'error amplifier,' the output of which (the 'control voltage') is fed to one of the two inputs of a 'pulse width modulator' (PWM) comparator. On the other input of this PWM comparator, a ramp is applied, and this produces the switching pulses. So For example, if the error at the output increases, the control voltage will decrease, and the duty cycle will thus decrease in an effort to reduce the output voltage. That is how regulation usually works. Fgr. 10: Sub-harmonic Instability in Current Mode Control, and Avoiding It By Slope Compensation --- disturbance increases disturbance decreases turn-on rn-on Slope compensation not present disturbance slope = S2 slope = S Slope compensation present |S|=|S2| Set disturbance Control Voltage Control Voltage In voltage mode control, the ramp applied to the PWM comparator is derived from an internal (fixed) clock. However in current mode control, it’s derived from the inductor current (or switch current). And the latter leads to a rather odd situation where even a slight disturbance in the inductor current waveform can become worse in the next cycle (see upper half of Fgr. 10). Eventually, the converter may lapse into a strange "one pulse wide, one pulse narrow" switching waveform. This represents an operating mode that is definitely not "legitimate" or desirable for several reasons - in particular, the output voltage ripple is now much higher, and the loop response is severely degraded. To get the disturbance to decrease every cycle and eventually die out, it can be shown that we need to do one of two things. Actually, both methods effectively amount to mixing a little voltage-mode control into current-mode control. So a) Either we add a small fixed (clock-derived) voltage ramp to the sensed voltage ramp (derived from the inductor/switch) b) Or we subtract the same fixed voltage ramp from the control voltage (output of error amplifier) As we can see from Fgr. 11, both are equivalent. That is in fact not surprising at all, considering that both the ramp and the control voltage go to the pins of a comparator. So if we compare a signal A + B with a signal C, that is exactly equivalent to comparing A to C - B. And in both cases, equality at the input pins is established when A + B = C. This technique is called 'slope compensation,' and is the most recognized way of quenching the alternate wide and narrow pulsing (or 'subharmonic instability') associated with current-mode control (see lower half of Fgr. 10). It can be shown that to avoid subharmonic instability, we need to ensure that the amount of slope compensation (expressed in A/s) is equal to half the slope of the falling inductor current ramp, or more. Note that in principle, subharmonic instability can occur only if D is (close to or) greater than 50%. So slope compensation can be applied either over the full duty cycle range, or just for D = 0.5 as shown in Fgr. 10. Note that subharmonic instability can also occur only if we are operating in continuous conduction mode (CCM). So one way of avoiding it altogether is to operate in DCM. If the amount of slope compensation is fixed by the controller, then as designers, we need to personally ensure that the slope of the falling inductor current ramp is equal to twice the slope compensation - or less (note that we are talking in terms of the magnitudes of the slopes only). This will in effect dictate a certain minimum value of inductance. And in terms of r, this tells us that we could have a situation where we may need to set r to less than the optimum of 0.4 - For example if the control IC has an inadequate amount of built-in slope compensation. === Control Voltage Control Voltage (with Slope Compensation) Switch Waveform with Voltage Ramp summed in Switch Waveform Voltage Ramp Switch Waveform CURRENT TIME CURRENT TIME Fgr. 11: Adding a Fixed Ramp to the Sensed Signal, or Modifying the Control Voltage, Are Equivalent Methods of Slope Compensation in Current-mode Control === As a result of more detailed modeling of current-mode control, optimum relationships for the minimum inductance required (to avoid subharmonic instability) have been generated as follows L = D - 0.34 Slope comp × VIN µH (buck) ... µH (buck-boost) ...where the slope compensation is in A/µs. Note that for all these topologies, we have to do the preceding calculation at the maximum input voltage point at which the duty cycle is greater than 50%, AND we are also simultaneously in CCM. More details on subharmonic instability and slope compensation can be found in Section 7. Quick-selection of Inductors Using "L × I" and "Load Scaling" Rules Finally, having decided upon the value of r based on all the considerations outlined so far, we first present a quick method of picking an inductor for a given application. After that we will proceed to a more detailed analysis and worked example. As mentioned previously, from the inductor equation V = L dI/dt, we can derive another useful relationship that we are calling the "L × I" equation (any topology) Symbolically L × I = voltseconds current ripple ratio (any topology) Fgr. 12: The "L × I" Curves for Quick Selection of Inductance --- Current Ripple Ratio 'r' So if we know the voltseconds (from our application conditions), and have a target value for r, we can calculate "L × I." Then knowing I, we can calculate L. Note that L × I can be visualized as a sort of inductance "per" ampere - except that the relationship is inverse - that is, if we increase the current, we need to decrease the inductance (by the same amount). So For example, if we get an inductance of 100 µH for a 2-A application, then for a 1 A application, the inductance must be 200 µH, and for a 4-A application, the inductance would be 50 µH, and so on. Note that because the L × I equation doesn't depend on topology, switching frequency, or on the specific input/output voltages, we can graph it out universally, as in Fgr. 12. That helps quickly pick an inductance for any application. Let us now exemplify the L × I graphical selection method for each topology. Worked Examples (2, 3, and 4) Buck: Suppose we have an input of 15-20 V, an output of 5 V, and a maximum load current of 5 A. What is the recommended inductance if the switching frequency is 200 kHz? a) We need to start the inductor design at VINMAX (20 V) for a buck. b) The duty cycle from Tbl. 1 is VO/VIN = 5/20 = 0.25. c) The time period is 1/f = 1/200 kHz = 5 µs. d) The off-time tOFF is (1 - D) × T = (1 - 0.25) × 5 = 3.75 µs. e) The voltseconds (calculated using the off-time)is VO ×tOFF = 5×3.75 = 18.75 µs. f) From Fgr. 12, with r = 0.4, and Et =18.75 µs, we get L × I = 45 µHA. g) For a 5 A load, IL = Io = 5A. h) Therefore, we need L = 45/5 = 9 µH. i) The inductor must be rated for at least (1 + r/2) × IL = 1.2 × 5 = 6A. Summarizing, we need a 9 µH/6 A inductor (or closest available). Boost: Suppose we have an input of 5 to 10 V, an output of 25 V, and a maximum load current of 2 A. What is the recommended inductance if the switching frequency is 200 kHz? a) We need to start the inductor design at VINMIN (5 V) for a boost. b) The duty cycle from Tbl. 1 is (VO - VIN)/VO = (25 - 5)/25 = 0.8. c) The time period is 1/f = 1/200 kHz = 5µs. d) The on-time tON, is D × T = 0.8 × 5 = 4 µs. d) The voltseconds (calculated using the on-time) is VIN × tON = 5 × 4 = 20 µs. e) From Fgr. 12, with r = 0.4, and Et = 20 µs, we get L × I = 47 µHA. f) For a 2 A load, IL = Io/(1 - D) = 2/(1 - 0.8) = 10 A. g) Therefore, we need L = 47/10 = 4.7 µH. h) The inductor must be rated for at least (1 + r/2) × IL = 1.2 × 10 = 12 A. Summarizing, we need a 4.7 µH/12 A inductor (or closest available). Buck-boost: Suppose we have an input of 5 to 10 V, an output of -25 V output, and a maximum load current of 2 A. What is the recommended inductance if the switching frequency is 200 kHz? a) We need to start the inductor design at VINMIN (5 V) for a buck-boost. b) The duty cycle from Tbl. 1 is VO/(VIN + VO) = 25/(5 + 25) = 0.833. c) The time period is 1/f = 1/200 kHz = 5 µs. d) The on-time tON is D × T = 0.833 × 5 = 4.17 µs. e) The voltseconds (calculated using the on-time) is VIN ×tON = 5×4.17 = 20.83 µs. f) From Fgr. 12, with r = 0.4, and Et = 20.83 µs, we get L × I = 52 µHA. g) For a 2 A load, IL = Io/(1 - D) = 2/(1 - 0.833) = 12 A. h) Therefore, we need L = 52/12 = 4.3 µH. i) The inductor must be rated for at least (1 + r/2) × IL = 1.2 × 12 = 14.4 A. Summarizing, we need a 4.3 µH/14.4 A inductor (or closest available). The Current Ripple Ratio r in Forced Continuous Conduction Mode ('FCCM') Finally, before we move on to magnetic fields, we make some closing remarks on designing with forced continuous conduction mode ('FCCM'). We had said previously, that by definition, r is defined only for CCM, and therefore cannot exceed 2 (since that marks the boundary between CCM and DCM). However in synchronous regulators (with diode replaced or supplanted by a low-drop mosfet across it), we actually never enter DCM (unless the IC is deliberately designed to mimic that mode on demand). So now, on decreasing the load, we actually continue to remain in CCM. That is because for DCM to ever occur, the inductor current must be forced to stay at least for some part of the switching cycle at zero. And to get that to happen, we need to have a reverse-biased diode that prevents the inductor current from "going the other way." But in synchronous regulators, the mosfet across the diode allows reverse-conduction even if the diode is reverse-biased, so we don’t get DCM. The CCM-type mode that replaces the DCM mode in synchronous regulators is distinguished from the usual (normal) CCM mode, by calling it the 'forced continuous conduction mode' (FCCM). The main switch is usually identified as the top (or "high-side") mosfet, whereas the mosfet across the diode is called the bottom (or "low-side") mosfet. Further, in FCCM, r is legitimately allowed to exceed 2 (see Fgr. 5). We can visualize FCCM as starting to occur when the load current is decreased sufficiently to cause part of the inductor current waveform to become "submerged" below ground - that is, with parts of it having a negative value (inductor current flowing momentarily away from the load). But note that as long as we are still drawing some load current out of the output terminals of the converter, the average value of the waveform, IDC (center of ramp), is still positive - that is, going towards the load - on an average. Further, because IDC is always proportional to the load current, it can be made to decrease all the way down to zero while still maintaining CCM. Since the swing in current, delta I, depends only on the input and output voltages, which we have assumed have not changed, the ratio r = delta I/IL not only exceeds 2, but can in fact become extremely large. All the basic design equations we can write for the RMS, dc, ac, or peak currents in the input/output capacitors and the switch, when operating in conventional CCM, apply to the converter in FCCM too (though there may be some additional losses, as For example when the current flows through the body diode of the top mosfet). This, despite the fact that r can now exceed 2. In other words, the CCM equations don’t get invalidated in FCCM. However, a specific computational problem can arise in some cases, because if r is infinite (zero load current), we can get a singularity - a "0" in the denominator. At first sight, that seems to make the CCM equations (presented the way we have been doing), unusable. But one trick we can employ to avoid the singularity is to assume a few milliamperes of minimum load, however small. Alternatively, we can substitute r = delta I/IDC back into the equations, and we will then see that IDC cancels out (does not appear in the denominator anywhere). Either way, the equations of CCM (see Sub-section 2), apply to FCCM too. Basic Magnetic Definitions: Having understood basic concepts like voltseconds, current components, worst-case voltage, and also how to do an initial (quick) selection of an off-the-shelf inductor, we will now try to go inside the magnetic component, so as to learn what happens in terms of the magnetic fields present inside its core. We will then use this information to do a more complete validation of a selected off-the-shelf inductor. Then we will find the remaining (worst-case) stresses of the converter. At the outset, we should note that in magnetics, there are several different systems of units in use. This can become very confusing, since even the basic equations look different depending on the system in use. It’s therefore a wise policy to stick to one system of units all the way through - converting to a different system, if required, only at the very end, that is, only at the level of numerical results (not at the level of the equations). Further, unless otherwise stated, the reader can safely assume we are using the meter kilogram-seconds system of units - that is, 'MKS' system, also called the 'SI' system (for System International). Here are the basic definitions: ++ H-field: Also called 'field strength,' 'field intensity,' 'magnetizing force,' 'applied field,' and so on. Its units are A/m. ++ B-field: Also called 'flux density' or 'magnetic induction.' Units of B are tesla ('T') or webers per square meter (Wb/m^2). ++ Flux: This is the integral of B over a given surface area. That is, If B is constant over the surface, we get the more common form f = BA where A is the area of the surface. Note: The integral of B over a closed surface is zero since flux lines don’t start or end at any given point but are continuous. ++ B is related to H at any given point by the equation B = µH where µ is the permeability of the material. Note that later we will use the symbol µ for 'relative permeability,' that is, the ratio of the permeability of the material to that of air. So in MKS units we should actually preferably write B = µcH, where µc is the permeability of the core (magnetic material). By definition, µc = µµ0. ++ The permeability of air, denoted by µ0, is equal to 4p × 10-7 Henries/m in MKS units. In CGS units it’s equal to 1. That is why in CGS units µc = µ, where µ is also automatically the relative permeability of the material (though units are different). ++ Faraday's law of induction (also called Lenz's law) relates the induced voltage V that is developed across the ends of a coil (N turns), to the (time varying) B-field passing through it. So V = N df/dt = NA dB/dt ++ The "inertia" of a coil to a change in flux through it due to a time varying current through it’s its 'inductance' L, defined as L = Nf / I Henries ++ Since it can be shown that the flux is proportional to the number of turns N, the inductance L is proportional to the square of the number of turns. This proportionality constant is called the 'inductance index' and is denoted by 'AL.' It’s usually expressed as nH/turns2 (though sometimes it’s considered to be mH/1000 turns 2, both being numerically the same). So L = AL × N2 × 10-9 Henries ++ When H is integrated over a closed loop, we get the current enclosed by the loop Hdl = I Amperes where the integration symbol above reflects the fact that it’s being performed over a closed loop. This is also called 'Ampere's circuital law.' ++ Combining Lenz's law with the inductor equation V = L dI/dt, we get V = N df / dt = NA dB / dt = L dI / dt ++ From this we get the two key equations used in power conversion delta B = L delta I NA ("voltage independent equation") delta B = V?t NA ("voltage dependent equation") The first equation can be written symbolically as B = LI NA (voltage independent equation) And the latter equation can be written in a more "power-conversion-friendly" form as follows BAC = VON D 2 × NAf (voltage dependent equation) Fgr. 13: B and I Can Be Usually Considered to Be Proportional to Each Other For most inductors used in power conversion, if we reduce the current to zero, the field inside the core also goes to zero. Therefore, an implicit assumption of complete linearity is also usually made - that is, B and I are considered proportional to each other as shown in Fgr. 13 (unless of course the core starts saturating, at which point, all bets are off!). The voltage independent equation can then be expressed as any of the equations shown in the figure - in other words, this proportionality applies to the peak values of current and field, their average values, their ac values, their dc values, and so on. The constant of proportionality is equal to L / NA (Proportionality constant linking B and I) where N is the number of turns and A the actual geometrical cross-sectional area of the core (its center limb usually, or simply the 'effective area' Ae given in the datasheet of the core). Worked Example (5) When Not to Increase the Number of Turns Note that the voltage-independent equation is useful if for example we want to do a quick check to see if our core may be saturating. Suppose we are custom-designing our inductor. We have wound 40 turns on a core with an area of A = 2cm^2. Its measured inductance is 200 µH, and the peak inductor current in our given application is 10 A. Then the peak flux density can be calculated as follows ... Note that we have converted the area to m^2 in the above equation, because we are using the MKS version of the equation. For most ferrites, an operating flux density of 0.25 T is acceptable, since the saturation flux density is typically around 0.3 T. Based on the B and I linearity, we can also linearly extrapolate and thus conclude that the peak current in our application should under no condition be allowed to exceed (0.3/0.25) × 10 = 12 A, because at 12 A, the field will be 0.3 T, and the core will then start to saturate. But note that nor should the number of turns be increased any further (at 12 A). Looking at the BPK equation above, it seems at first sight that increasing the number of turns will reduce the B-field. However, inductance increases as N2 (from the AL equation given previously), so the numerator will increase much faster than the denominator. Therefore, in reality, the B-field will increase, rather than decrease if we increase the number of turns, and we know we can't afford to exceed 0.3 T. In other words - we usually tend to instinctively rely on the current-limiting properties of an inductor. And in general, increasing the inductance will certainly help increase the inductance and therefore help limit the current. However, if we are already close to the energy-storage limits of the material of the core, we have to be very careful - a few extra turns could take us "over the edge" (saturation), and then in fact, the inductance will start collapsing rather than increasing. We should also not forget our basic premise of inductors in power conversion - for a given application, a large inductance does usually end up requiring a large inductor! So, increasing the number of turns, without increasing the size, may naturally turn out to be a recipe for disaster. The "Field Ripple Ratio": Since I and B are proportional to each other, and r happens to be a ratio, we realize that r must apply equally to the field components as it does to the current components. So, in that sense, r can be looked at as a "field ripple ratio" too. We can therefore extend the definition of r as follows: Therefore, r can also be used to relate the peak, ac, and dc values of both the current and field according to the equations: We can relate the peak to the swing too as follows: The latter form will in fact be used later by us in the worked example that will follow. The Voltage Dependent Equation in Terms of Voltseconds (MKS units) When discussing the current swing delta I, we related it to the voltseconds. Now we can do the same for the B-field delta B = L × delta I N × A = Et N × A teslas So as for current, the voltseconds in our application also determines the swing of the magnetic field - though not its dc level. CGS Units: We may personally prefer to use the more broadly accepted MKS units, but we have to deal with the ground reality of the situation - that certain vendors (especially North American ones) still use 'CGS' (centimeter-gram-seconds) units. Since we would certainly be evaluating and looking at their datasheets too, we will need to use the conversions in Tbl. 4. In particular, we should remember that the saturation flux density BSAT, which is around 0.3 T (300 mT) for most ferrites, is 3000 gauss ('G') in CGS units. Also note that permeability of a material in MKS units needs to be divided by 4p × 10-7 to get the permeability in CGS units. The reason for that is that permeability of air is set to 1 in CGS units, but in MKS units it’s (numerically) equal to 4p × 10^-7. === Tbl. 4: Magnetic systems of units and their conversions CGS units MKS Units Conversions Magnetic Flux Line (or Maxwell) Weber 1 Weber = 106 Lines Flux Density (B) Gauss Tesla (or Wb/m^2) 1 Tesla = 104 Gauss Magnetomotive force Gilbert Ampere-turn 1 Gilbert = 0.796 Ampere-turn Magnetizing Force Field (H) Oersted Ampere-turn/meter 1 Oersted = 1000/4p = 79.577 Ampere/meter Permeability Gauss/Oersted Weber/m-Ampere-turn µMKS = µCGS × (4p × 10-^7) === The Voltage Dependent Equation in Terms of Voltseconds (CGS units) It’s also therefore helpful to know how to write the voltage dependent equation, (expressed in terms of Et), in CGS units instead. So, converting A in m^2 to A in cm^2, we get from the previous equation delta B = 100 × Et N × A gauss (A in cm^2 ) Core Loss: The core loss depends on various factors - the flux swing delta B, the (switching) frequency f, and the temperature (though we usually ignore this latter dependency for most estimates). Note however, that when vendors of magnetic materials express the dependency of core loss on a certain "B," what they are really talking about is delta B/2, that is, BAC. This happens to be the usual industry convention, but it’s often quite confusing to power supply designers. In fact, there is more confusion caused by the fact that "B" may be expressed by the vendor, either in terms of gauss or in teslas. In fact, the dissipation also (due to the core loss) may be expressed either as mW or as W. First let us look at the general form of core loss. Core Loss = (Core Loss per unit volume) × Volume where 'core loss per unit volume' is expressed generally as: constant t1 × B constant t2 × f constant t3 In Tbl. 5 we have indicated the three main systems of units in use for describing the core loss per unit volume, and also provided the rules for converting between them. Note we are using 'Ve' (effective volume) here - this can usually be considered to be simply the actual physical volume of the core, or we can just look it up in the datasheet of the core. ========= Tbl. 5: The different systems in use for describing core loss (and their conversions) Constant exponent of B exponent of f B f Ve Units System A Cc Cb Cf Tesla Hz cm^3 W/cm^3 = C × 104×p 103 = p = d System B C p d Gauss Hz cm^3 mW/cm^3 = Cc × 103 104×Cb = Cb = Cf System C Kp n m Gauss Hz cm^3 W/cm^3 = C 103 = p = d ========= In Tbl. 6 we have provided values for the constants in the core loss equation in one of these systems of units, besides some other operating limits. The reader is however advised to confirm these values from the respective vendors. Worked Example (6)-Characterizing an Off-the-shelf Inductor in a Specific Application Now we will present the "general inductor design procedure" we have been talking about. We will be considering a wide-input voltage range here. The procedure is to be carried out at the "worst-case input voltage end" with respect to the peak current. The basic purpose is to ensure that we are avoiding inductor saturation under normal operation. So for the buck, we will work at VINMAX, since that is the point at which the peak current is at its maximum. For a boost or a buck-boost, we need to conduct this procedure at VINMIN, not VINMAX, since that is the worst-case input voltage end with regard to the peak current, for these topologies. The procedure will be illustrated by means of a step-by-step worked example. Though it’s carried out for a buck, throughout the calculation, we will indicate precisely how the procedure and equations may need to change, were this a boost or a buck-boost. So for example, to the right of any equation presented below, we have indicated in brackets, which topology it’s valid for. A buck converter has an input of 18-24 V, an output of 12 V, and a maximum load of 1 A. We desire a current ripple ratio of 0.3 (at maximum load). We assume VSW = 1.5 V, VD = 0.5 V, and f = 150,000 Hz. An off-the-shelf inductor is to be selected and characterized for this application. Tbl. 6: Typical core loss coefficients of common materials As mentioned, all the steps involved in the "general inductor design procedure" below are being carried out at a certain "VIN" - which is the maximum input voltage for a buck, and minimum input voltage for a boost or a buck-boost. Estimating Requirements: For a buck regulator, the duty cycle is (now including the switch and diode forward drops) ... The switch on-time is therefore ...(any topology) The voltage across the inductor when the switch is ON is.... (For boost and buck-boost, use VON = VIN - VSW). So the volts-µseconds is: Et = VON × tON = 10.5 × 3.62 = 38.0 Vµs (any topology) Using the "L × I" equation: We now pick a promising off-the-shelf inductor - the PO150 from Pulse Engineering. Its inductance is 137 µH, which is close to our requirement of 127 µH, and it’s rated for a continuous dc of 0.99 A, which is very close to our requirement of 1 A. Its datasheet is reproduced in Tbl. 7. Note that the other conditions mentioned by the vendor don’t match our application (but that is not unexpected - what are the chances of an off-the-shelf inductor that precisely matches a given application?). Nevertheless we can perform a full analysis, and thus either validate, or invalidate our choice of component. == Tbl. 7: Specifications of a selected inductor (the PO150) IDC (A) LDC (µH) Et (Vµs) DCR (m_) Et100 (Vµs) 0.99 137 59.4 387 10.12 ++ The inductor is such that 380 mW dissipation corresponds to 50fic rise in temperature. ++ The core loss equation for the core is 6.11 × 10-18 × B2.7 × f 2.04 mW where f is in Hz and B is in gauss. ++ Et100 is the Vµsecs at which "B" is 100 gauss. ++ "B" is BAC, i.e. delta B/2. ++ Rated frequency of operation is 250 kHz. == Current Ripple Ratio We use the "L × I" rule .... This is very close to (and less than) our target of r = 0.3, and is therefore acceptable. Peak Current: The inductor has been designed for a peak current of .... In our application we will get .... The peak current in our application is considered "safe," being less than what the inductor was originally designed for. Therefore, we can safely assume that the peak B-field of our application also must be within the design limits of the inductor. However it’s instructive to confirm that directly, as we will do next. Note that the frequency has not even entered the picture directly so far, since voltµseconds is all that really matters to an inductor. Different applications, with the same dc level of current, and the same voltseconds, are essentially the same application from the viewpoint of the inductor. It just "doesn't care" For example, what topology this is, or what is the duty cycle. It doesn't even care about the frequency directly (though the exception to this is the core loss term, because that depends not only on the voltseconds, i.e. the current swing, but on the frequency too). However, we will also see that the core loss term is much smaller anyway, compared to the copper loss. So for all practical purposes, if the rated voltseconds of a given inductor (current swing), and its dc current rating correspond to the voltseconds and dc current of our application, we are almost certainly going to be fine right off-the-bat. However, even if the rated voltseconds and dc level are quite different, as long as the peak flux density is close to or less than the rated value, we are OK from the saturation point of view. That's a good start, and we can then proceed to do a full validation analysis –of the temperature rise and so on under our specific application conditions. Flux Density: The vendor provides the following information (see Tbl. 7): Et100 = 10.12 Vµs This means that the voltµseconds that produces a BAC of 100 gauss is 10.12. Since BAC = delta B/2, the corresponding delta B is 200 gauss (for every 10.12 Vµs). We had previously presented the following relationship between delta B and Et: delta B = 100 × Et N × A gauss (any topology) Since delta B and Et are proportional to each other (for a given inductor), we can conclude that the inductor has been designed for a flux density swing of … (any topology) ... and a peak flux density of .... In our application this will give us a swing of ... (any topology). We see that the peak field in our application is within the design limits of the inductor, as expected, so we need not worry about core saturation. This is a basic qualification the inductor must pass before we can proceed with the rest of the analysis. Note that the proportionality constant connecting B and I is .... Note: If we break open the inductor and measure the number of turns, and also estimate/measure the cross-sectional area of the central limb of its core, we can verify this number. Fgr. 14: RMS Value of an Inductor Current Waveform Copper Loss: From the equations contained in Fgr. 14, we can calculate the RMS of the inductor current waveform. The inductor was designed for an RMS squared of ... and a copper loss of... (any topology) Whereas in our application we will get ....and a copper loss of (any topology) Core Loss Note that the vendor has already factored in the volume of the core and thus provided the following overall equation for the core loss of the inductor: (any topology) … where f is in Hz and B is in gauss. Note that "B" is delta B/2 here as per convention. So the core loss that the inductor was originally designed for is ... Whereas in our application: In general, we will find that in most ferrite-based off-the-shelf inductors, the designed core loss is only 5 to 10% of the total inductor loss (copper-plus-core loss). However, if the inductor uses a 'powdered iron' core, this number may rise to about 20 to 30%. Note: Powdered iron cores tend to saturate more "softly" than ferrites, and that usually enhances their ability to withstand severe abnormal currents without leading to immediate switch destruction. On the other hand, powdered iron cores may have "lifetime" issues caused by slow degradation of the organic binder that holds their iron particles together. The vendor must be consulted about this possibility, and the steps necessary to avoid a premature end to our converter! Temperature Rise The vendor has stated that the inductor is such that 380 mW dissipation corresponds to 50fic rise in temperature. In effect this tells us that the thermal resistance of the core 'Rth' is (any topology) The inductor was originally designed for a total loss of P = PCORE + PCU = 385 + 18.8 = 403.8 mW (any topology) This would have given a temperature rise of: C (any topology) In our application: This will give a temperature rise of: Provided we accept this temperature rise in our application (that will depend on our maximum operating ambient temperature), we can validate the chosen inductor. We have already confirmed it does not saturate in our application, and further, the current ripple ratio it provides is acceptable too. This completes the general inductor design procedure. |
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