DC-DC Converter Design and Magnetics--Inductor Current Rating, etc.

What Is the Inductor Current Rating We Need to Consider for a Given Application?

Whenever we start-up, or subject the converter to sudden line/load transients, the current no longer stays at the steady value it has under normal operation (i.e. when delivering the required maximum rated load current). For example, if we suddenly short the output the control circuitry in an effort to regulate the output may momentarily expand the duty cycle to the highest permissible value (as set by the controller). We then are no longer in steady state, and so under the increased on-time voltseconds, the current ramps up progressively, and can reach the set current limit.

But then, the inductor would probably be saturating! For example, if we are using a 5-A fixed current limit buck switcher IC for a 3-A application, we have probably picked an inductor rated for only around 3 A. But when we short the output, the current momentarily hits the current limit (which may be around 5.3 A for a "5-A buck switcher").

So the question is - should we select an inductor with a rating based on the current limit threshold (that it may encounter under severe transients), or simply on the basis of the maximum continuous normal operating current (under steady state operation in our application)? In fact, this question is not as philosophical as it may seem - it virtually separates standard industry off-line design procedures from those of dc-dc converters. To answer it effectively, a lot of factors may need to be considered, often on an individual or case-by-case basis. Let us address some of these concerns next.

Luckily, in most low-voltage applications, a certain amount of core saturation doesn't cause any problem. The reason for that is that if in the above example, the switch is rated for 5 A, and the current limiting circuit in the IC is known to act fast enough to prevent the current from ever rising beyond 5 A, then even if the inductor has started saturating as it gets to 5 A, there is no cause for concern - after all, if the switch doesn't break, we don't have a problem! And since the current doesn't exceed 5 A, the switch cannot break. So in this case, we could certainly pick a cost-effective "3 A inductor" for our application, knowing well in advance that it would saturate somewhat under various non-steady conditions. Of course we don't want to operate a switching converter constantly (under its rated maximum load conditions) with a saturating inductor - we just "allow" it to do so under abnormal and temporary conditions, so long as we are sure that the switch can never be damaged.

However, the above logic begs another key question to be answered - what exactly constitutes "fast enough" - that is, which factors affect our ability to turn the switch OFF fast enough to protect it from the consequences of a saturating inductor? Since this consideration may eventually end up dictating the size and cost of the inductor, it’s important to understand this response-time issue well.

a) All current limit circuitry takes some finite time to respond. There are inherent (internal) "propagation delays" as we move the overcurrent signal through the internal comparators of the IC, its op-amps, level-shifters, driver, and so on to the IC pin driving the switch.

b) If we are using a controller IC (as opposed to an 'integrated switcher,' i.e. with an internal switch), the switch will necessarily be at a certain physical distance from its driver (which is usually inside the IC). In that case, the parasitic inductances of the intervening PCB traces (roughly 20 nH per inch of trace) will resist any sudden change in current, thereby creating an additional delay before the turn-off command issued by the IC actually reaches the gate/base of the switch.

c) Theoretically speaking, even if the current limiting circuitry had responded immediately to the overcurrent condition, and if the intervening traces had truly negligible inductance, the switch may still take a little time before it really turns itself OFF. During this delay, if the inductor is saturating, it won’t be able to effectively prevent or limit the current spike that can be pushed through the transistor by the applied input dc source -- well beyond the "safe" current limit threshold.

Bipolar junction transistors (bjts) are inherently slow, as compared to more modern devices like mosfets. But large mosfets (e.g. high-current, high-voltage devices) also produce delays because of their higher internal parasitic gate resistance and inductance and significant inter-electrode parasitic capacitances (that demand to be either discharged or charged as the case may be, before they allow the switch to change its state). Matters can get worse if we parallel several such mosfets together, as say for a very high-current application.

d) Many controllers and ICs incorporate an internal "blanking time" - during which they deliberately "do not look" at the current waveform. The basic purpose is to avoid false triggering of the current limit circuitry by the noise generated at the turn-on transition. But this delay time could prove fatal to the switch, especially if the inductor has already started saturating, because the current limit circuitry won't even "know" if there is any overcurrent condition during this blanking interval.

Further, in current-mode control ICs, the ramp to the PWM (pulse-width modulator) comparator stage is usually derived from the (noisy) switch current. So the blanking time is typically set even higher - typically about 100 ns for low-voltage applications and up to 300 ns for off-line applications.

e) Integrated high-frequency switchers (i.e. with the mosfet or bjt switch contained in the same package as the control and driver) are usually the best-protected and most reliable, because the intervening inductances are minimized. Also, the blanking times can be set more accurately and optimally, since there is not going to be much variation in terms of different switches with widely varying characteristics.

Therefore, integrated switchers can usually survive momentarily saturating inductors with almost no problem --unless the input voltage is very high (typically above 40-60 V), and plus, the inductor is sized very small.

f) If the input voltage is high, the rate of rise of the saturating inductor current ramp can become very large ("steep"). This follows from the basic equation V = L dI/dt.

Here, if L? 0, since V is fixed, the dI/dt must increase dramatically (see Fgr. 7). So now, even a small delay can prove fatal because a large delta I can take place during a very small interval. The current can therefore overshoot the set current limit threshold by a very large amount, thereby endangering the switch. That is why, especially when we come to off-line applications, it’s actually customary to select a core large enough to avoid saturation at the current limit threshold. And that usually gives enough time for the current limit circuitry to act - before the slope of the current has gone completely out of control.

Note however, that the copper windings still only need to be proportioned to handle the continuous current (i.e. based on the maximum operating load).

In effect, what we are therefore always implicitly doing in off-line applications is setting the ISAT of the transformer higher than its IDC rating. That is clearly not what we usually do in low-voltage dc-dc converter design.

g) Generally speaking, in most low-voltage applications (i.e. VIN typically less than about 40 V), the inductors are selected based only on the maximum operating load current. The current limit is therefore, in effect, virtually ignored! This is the usual industry practice for dc-dc converter design, though it’s probably not clearly spelled out in this way most of the time. But luckily, it seems to have worked!

Fgr. 7: How Higher Voltages Combined with Inherent Response-time Delays Can Cause Overstress in the Switch When the Inductor Starts Saturating --- Steeply Rising Current under High Applied Voltage; Delay in Current Limit being Enforced; Hazardous level of Peak Current

The Spread and Tolerance of the Current Limit

Any specification, including the current limit, either set by the user or fixed internally in the IC, will have a certain inherent tolerance band - that includes spreads over process variations and over temperature. All these variations are combined together inside the electrical tables of the datasheet of the device, under its "MIN" and "MAX" limits. In a practical converter design, a good designer learns to pay heed to such spreads.

But let us first summarize the general procedure for selecting the inductance for a switching power converter. Then we will look at the practical issues concerning spreads/tolerance.

The normal procedure is to determine the inductance by requiring that the current ripple ratio is about 0.4 - because we know that that represents an optimum of sorts for the entire converter. But there may be another possible limitation when dealing with switcher ICs, especially those with internally set (fixed) current limits - if our normal operating peak currents are close to the set current limit of the device (i.e. we are operating close to the maximum current capability of the switcher IC), we need to ensure that the inductance is large enough not to cause the calculated operating peak current (within any given cycle) to exceed the current limit - otherwise foldback will obviously occur at the current limit threshold, and so the desired maximum output power cannot be guaranteed.

For example, if we have a "5-A buck switcher IC," being operated at 5-A load, with an r of 0.4, then the normal operating peak current is 5 × (1 + 0.4/2) = 5 × 1.2 = 6A.So ideally, we would want the current limit of the device to be at least 6 A. Unfortunately, when we come to such integrated switchers, that much of "margin" is rarely available - manufacturers always like to "bolster" the advertised ratings of their parts to be close to the maximum stress limits. So yes, if this particular part was declared to be a "4-A IC" instead of a "5-A IC," we would have been just fine. But as things stand, manufacturers usually pay scant regard as to what may constitute an optimum rating for the device, in relationship to its associated components and the overall design strategy. Therefore, For example, a certain commercial "5-A switcher IC" may have a published (set) current limit of only 5.3 A. But on analysis, we see that allows only 0.3 A above, and 0.3 A below, the average level of 5 A. Therefore, the maximum allowed delta I at 5 A load is only 0.6 A. And the maximum r is

0.6/5 = 0.12 (when operated at a load current of 5 A). We can see that that is clearly much less than the optimum r of 0.4. And no doubt, this lowered r will adversely impact the size of the inductor (and converter).

Now we take up the issue of the spread in current limit. So ICLIM is actually two limits - ICLIM_MIN and ICLIM_MAX (i.e. the MIN and MAX of the current limit respectively). The question is - which of these limits should we consider for designing the inductor?

++ To guarantee output power, we need to look at the MIN of the current limit only. In most low-voltage dc-dc converter applications, the MIN limit is the only threshold that really counts - we can usually completely ignore the MAX (and of course the TYP value). The basic criterion for guaranteeing output power is - we must ensure that the calculated normal operating peak current in our application is always less than the MIN value of the current limit. Of course, if we are not operating close to the current limit of the device, this condition will be met without any struggle, and so we can then just focus on setting r to about 0.4.

++ But like all components, inductors also have a typical tolerance - usually about ±10%. So if we are operating very close to the limits of the device, and thereby r is being effectively dictated by the MIN of the current limit (rather than by its optimum or desirable value), then the (nominal) value of inductance we ultimately choose should be about 10% higher than the calculated value. That will guarantee output power unconditionally - under all possible variations in current limit and inductance.

++ Note that ideally, we would also like to leave at least 20% additional margin (headroom) between the peak current of our application and the MIN of the current limit. This is usually necessary for getting a quick response (correction) to a sudden increase in load. So in general, if we somehow manage to curtail the ability of the converter to respond quickly ( For example, by not providing sufficient headroom in the current limit and/or maximum duty cycle), the inductor won’t be able to ramp up current quickly enough to meet the sudden increase in energy demand. Therefore, the output will droop rather severely for several cycles, before it eventually recovers.

But unfortunately, once again, when dealing with fixed current limit (integrated) switchers, we will find that this "nice-to-have transient headroom" may be a luxury we just can't afford - because in most cases, the MIN current limit is set only slightly higher than the declared "rating" of the device. So in fact even a 20% headroom may not be available! And further, even assuming it is, this may demand a very large (impractical) inductance. And we know that that by itself is fairly counterproductive - a large inductance takes even more time for its current to ramp up, and that thereby effectively slows down the transient (loop) response - incidentally, just opposite to what we were hoping to derive here! Therefore, in general, we almost always end up ignoring this 20% or so step-response headroom/margin completely, especially when dealing with integrated switcher ICs.

As for the MAX of the current limit, whenever we deem that inductor saturation is of real concern to us (as in high-voltage applications), we must look at the MAX of the current limit to decide upon the size of the inductor - that being the worst-case in terms of peak current under overloads, inductor energy storage, and its possible saturation.

Therefore in general, in high-voltage dc-dc (or off-line) applications, the MIN of the current limit may sometimes need to be considered when selecting inductance (as when operating close to current limit), but the MAX of the current limit will certainly always be used to determine the size of the inductor.

As a corollary, manufacturers of (low-voltage) dc-dc converter ICs actually need not (and probably justifiably do not) struggle too hard to minimize the spreads and tolerances of current limit (provided of course the MIN of the current limit is at least set high enough not to intrude on the declared power-handling capability of the IC). And for low-voltage dc-dc converter applications, the current limit is typically ignored altogether - the final selection of inductor current rating (and size) is simply based on the cycle-by-cycle peak inductor current under normal (steady) operation (i.e. the maximum load of the application, at the worst-case input voltage end).

On the other hand, manufacturers of off-line switcher ICs do need to maintain a tight tolerance on the current limit. In their case, the maximum power-handling capability of their particular device is in effect dependent only on the 'MIN' (minimum limit) of the current limit specification, whereas, the transformer size is determined entirely by the 'MAX' of the current limit specification. So in this case, a "loose" current limit specification effectively amounts to requiring bigger components (transformer) for the same maximum power handling capability.

Note: Some makers of off-line integrated switcher ICs (e.g. the "Topswitch" from Power Integrations) often tout their "precise" current limit - thus suggesting that we get the best power-to-size ratio (i.e. converter power density) when using their products. However, we should remember that in most cases, their product families have a discrete set of fixed current limits. And that is a problem! For example, we may have devices available with current limits in steps of 2 A, 3 A, 4 A, and so on. So yes, we may indeed get a higher power density when operating at the maximum rated output power of a particular IC. But when operating at a power level between available current limits, we are not going to get an optimum solution. For example, in an application where the peak current is 2.2 A, then we would need to select the 3 A current limit part, and we will need to design our magnetics to avoid core saturation at 3 A. So in effect, we have a very imprecise current limit now! The best solution is to look for a part (integrated switcher or controller plus mosfet solution) where we can precisely set the current limit externally, depending upon our application.

With all these subtle considerations in mind, a designer can hopefully pick a more appropriate inductor current rating for his or her application. Clearly, there are no hard and fast rules. Engineering judgment needs to be applied as usual, and perhaps some further bench-testing may also be needed to validate the final choice of inductor.

In the worked examples that follow, the general approach and design procedure will become clearer.