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1 INTRODUCTION
Many instrument and computer systems require early warning of imminent power failure, to provide sufficient time for an organized system shutdown. To maintain the output volt ages above the minimum specified values during this "house-keeping" process, sufficient energy must be stored in the power supply. A minimum holdup time (after power failure warning) of between 2 and 10 ms is usually specified.
2 POWER FAILURE AND BROWNOUT
Line failure can, of course, take many forms, but it will normally fall into one of the following three categories.
1. Total Line Failure: Instantaneous and catastrophic failure to zero or near zero voltage.
2. Partial Brownout: A fall in line voltage to a value below the normal minimum (but not zero), followed by a recovery to normal.
3. Brownout failure: A brownout condition followed by eventual failure.
3 SIMPLE POWER FAILURE WARNING CIRCUITS
FIG. 1 shows a simple optically coupled circuit typical of those often used for power failure warning. However, it will be shown that this type of circuit is suitable only for type 1 failures; that is, total line failure conditions. It operates as follows.
The ac line input is applied to the network R1 and bridge rectifier D1 such that unidirectional current pulses flow in the optical coupler diode. This maintains a pulsating conduction of the optical coupler transistor Q1. While this pulsating condition continues, C2 will be "pumped" low and maintain Q2 "on." Hence the output power failure signal will remain high all the time the ac supply voltage is high enough to drive current into D1.
When the ac line input fails, D1 no longer provides current to OC1, and Q1 turns off. C2 will charge via R2, and Q2 turns off. The power failure signal then goes low.
Because this circuit does not have a defined threshold voltage, it will give the required advance warning correctly only for condition 1 (a complete or nearly complete line failure). It will not necessarily give the advance warning correctly for condition 2 or 3 because during brownout the voltage may still be high enough to maintain D1 conducting. Further, there is a delay between line failure and a warning signal as C2 charges.
During a line failure, the energy stored in the power supply will maintain the output voltage for a time period that depends on the input voltage prior to failure, the part of the cycle in which the failure occurs, the loading conditions, and the design of the supply.
This holdup time can be more, but must not be less, than the power failure warning period required plus the delay period of the warning circuit.
With the simple circuit of FIG. 1, during a brownout condition as specified for condition 2, the voltage may fall low enough for power supply output regulation to be lost, but not low enough for a power failure signal to be given. For brownout (condition 3), even if the power supply maintains the required output voltages, at the end of the brownout period when the line voltage eventually fails, the circuit will respond with a failure signal, and there will not be sufficient energy remaining in the power supply to maintain the output voltage for the prescribed warning period. Hence this type of circuit is not always fully satisfactory for brownout conditions.
Since brownout conditions occur most often, the simple type of power failure warning shown in FIG. 1, although often used, may be of little value.
4 DYNAMIC POWER FAILURE WARNING CIRCUITS
The more complex dynamic power failure warning circuits are able to respond to brownout conditions. Many types of circuit are in use, and it may be useful to examine some of the advantages and disadvantages of some of the more common techniques.
FIG 1 Simple optocoupled power failure warning circuit.
Figures 2 and 3 show two circuits that will ensure that sufficient warning of failure is given for all conditions.
FIG. 2 More precise "brownout" power failure warning circuit.
FIG. 3 Power failure warning circuit with "brownout" detection.
In the first example, a fraction of the DC voltage on the power converter reservoir capacitors C1 and C2 is compared with a reference voltage by comparator amplifier A1.
If this voltage falls to a value at which the power supply (if it were operating at full load) would only just provide the prescribed hold time, then the output of amplifier A1 goes high, energizing the optical coupler, and a failure warning will be generated; the output signal goes low ("true low" logic).
This is a well-defined and reliable warning system, but it requires that the power sup ply be designed to provide sufficient holdup time from a minimum defined input voltage (below the normal minimum working voltage), to ensure that the specified warning period is satisfied before the output voltage falls. To meet this need, a larger and more expensive supply is required for the following reasons.
Since a warning must not be given at or above the specified minimum working line voltage for the power supply, the selected warning voltage value must be lower than the minimum DC voltage normally found on C1 and C2 under fully loaded minimum line input voltage conditions.
To provide the required holdup time under fully loaded conditions, from this lower capacitor voltage, the converter must continue to give full output for a supply voltage that is even lower than normal; hence larger reservoir capacitors and larger-current rated input components will be required. This makes the power supply larger and more expensive.
Moreover, even this more complex arrangement can still give a false power failure warning for a brownout condition of type 2. If the brownout continues for a period and then the supply recovers, a spurious failure warning can be caused by the capacitor volt age falling below the minimum warning value before the line recovers, initiating a failure signal. It is clear that in this case there is no option but to indicate a failure signal when the stored energy on the storage capacitors reaches the critical value. Although the line may recover before eventual failure of the outputs, a failure signal must be given at this time because the system cannot know that the line will recover in time.
The arrangement has the advantage that short transient variations in input voltage below the critical limit will not cause a failure warning, since the reservoir capacitors will not discharge to the critical voltage very rapidly. A further advantage is that at lower loads or higher input voltages, there will be a longer delay before the capacitors discharge to the critical voltage and a power failure warning is generated.
This system provides the maximum rejection of input transient conditions, eliminating spurious and unnecessary failure warnings. The delay time adjusts "dynamically" in response to the loading and input voltage conditions; hence the name.
FIG. 3 shows a circuit that has advantages similar to those of the previous dynamic system, but does not require an auxiliary supply or comparator amplifier. This circuit can be used in the rectified supply to the main converter, as shown, or, with appropriate component adjustments, in the supply to the auxiliary converter. It operates as follows.
The bridge rectifier D1-D4 will provide a full-wave rectified input to the divider chain R1, ZD1. At the same time, this input is applied to diode D5.
The peak ac input voltage is rectified by D5 and stored on capacitor C1. The DC voltage on C1 is monitored via ZD2 and Q1 and would normally bias Q1 "on".
The rectifier diode D5 blocks the DC voltage on C1 and allows the voltage across R1, OC1, and Q1 to fall to zero each half cycle; that is, the voltage across R1, OC1, and Q1 follows the input voltage. Hence, OC1 must turn off for a short period each cycle, even if the DC voltage on C1 is high and Q1 is on.
A failure warning will be given if OC1 turns off for more than 3 ms. This occurs if the voltage on C1 falls to a value at which Q1 and hence OC1 turns off; this critical voltage is defined by ZD1. Also, if the input supply fails completely for more than 3 ms, a power failure warning will be given irrespective of the state of charge on C1 (the main reservoir capacitor in the supply). In this case OC1 is off because the supply to R1 and OC1 is missing if the input supply is missing.
As long as the voltage on C1 is above the minimum value required to give the required minimum holdup time, the zener diode ZD2 will be conducting and Q1 will be on. During each half cycle, when the supply voltage to R1 exceeds a few volts, OC1 will turn on, providing a discharge pulse to C2 and preventing C2 from charging to the 2.5-V reference voltage PZ1. (At 2.5 V, PZ1 and Q2 would turn on, giving a fail signal.) This discharge "pumping" action will continue as long as the supply voltage on C1 is above the minimum value and the supply does not fail.
If the line input fails or the voltage on C 1 falls below the minimum value required to maintain ZD2 conducting (brownout), Q1 and OC1 will remain off and the pulse discharge of C2 will stop. C2 will now charge, turning PZ1 and Q1 on and giving a power failure warning. This warning will be given if OC1 is off for more than 3 ms. The delay period is well defined. When OC1 is off, C2 charges via R4 until the threshold voltage of PZ1 is reached (2.5 V). At this voltage PZ1 conducts, turning on Q2 and generating a power failure "high" signal.
If the line input fails, even if C1 remains charged and Q1 remains on, there is no supply to R1 and OC1 and a failure indication is given. This fast response provides and earlier warning of line failure so that the power supply holdup time need not be so long.
5 INDEPENDENT POWER FAILURE WARNING MODULE
The previous two power failure circuits must be part of the power supply, as they depend on the internal DC header voltage for their operation. FIG. 4 shows a circuit that will operate directly from the line input and is independent of any power supply.
FIG. 4 Independent power failure module for direct operation from ac
line inputs.
This circuit has its own bridge rectifier D1-D4, which again provides a full-wave rectified input to the feed resistor R1, ZD1, and the optical coupler diode OC1 and IC1. Provided that the DC voltage on C1 is above the critical minimum value, IC1 (a TL431 shunt regulator IC) will be turned on, regulating the voltage at point A at 5 V. (Note: Diode D6 conducts, clamping the voltage across R3, R4 and maintaining point A at 5 V.) When the rectified input to R1 rises above 5 V, during each half cycle, the OC1 diode will conduct, turning the OC1 transistor Q1 on and providing a discharge pulse to C2. This "pumping" action prevents C2 from charging; R5 and R6 will be conducting, and Q2 will be on. The output warning signal will remain "high," in this case the normal power good indication state.
As before, a failure (low) signal will be given if OC1 is off for more than 3 ms, allowing C2 to charge. This occurs if the voltage on C1 falls below the critical value required to maintain ICI "on" or if the line input fails.
This circuit is more precise than the previous systems, with a better temperature coefficient. The shunt regulator IC1 has a more precise internal voltage reference. Otherwise the function is similar to that shown for FIG. 3.
The time constant for the divider network R2, R3, R4, and C1 should be much less than the discharge time constant of power supply primary capacitors, to ensure that a warning is given for brownout conditions before the power supply drops out of regulation.
6 POWER FAILURE WARNING IN FLYBACK CONVERTERS
Very simple power failure warning circuits can be fitted to flyback converters, because in the forward direction the flyback transformer is a true transformer, providing an isolated and transformed output voltage that is proportional to the applied DC.
FIG. 5 shows the power section of a simple single-output flyback supply providing a 5-V output. Diode D1 conducts in the flyback mode of T1 to charge C2 and deliver the required 5-V output. The control circuit adjusts the duty cycle in the normal way to maintain the output voltage constant.
FIG. 5 A simple power failure warning circuit for flyback converters.
An extra diode and capacitor D2, C3 have been added such that D2 conducts in the forward mode of T1, developing a voltage Vf on C3 of VP/n, which is proportional to the line input.
The divider network R2, R3 is selected such that the SCR will turn on when the input voltage is at the critical minimum value. Note: This method gives good input transient under voltage rejection, as a warning will not be generated until the header capacitor C1 has discharged to the critical value required for minimum warning of dropout. Under light loading conditions, or when the input voltage has previously been high, a longer delay is provided.
In this example an option is provided for a "true high" or "true low" power failure signal (PFS) output.
Resistor R1 limits the charge current into C3 and prevents peak rectification of leakage inductance spikes. Its low value prevents any race condition at switch-on and gives fast response. After a failure signal has been given, the supply must be turned off to reset the SCR. The circuit is simple but gives good performance.
7 FAST POWER FAILURE WARNING CIRCUITS
The previous systems shown in this section respond quite slowly to brownout conditions, because they are sensing peak or mean voltages. The filter capacitor in the warning circuit introduces a delay. Its value is a compromise, being low enough to prevent a race between the holdup time of the power supply and the time constant of the filter capacitor, but large enough to give acceptable ripple voltage reduction.
It is possible to detect the imminent failure of the line before this has fully developed by looking directly at the rectified line input. The circuit can respond to the reduction in the dv/dt (rate of change of input voltage), which occurs at the beginning of a half cycle of operation if the peak voltage is going to be low. Hence the system is able to give more advanced warning of impending low-voltage conditions.
The circuit recognizes very early that the rate of change of input voltage is below the value necessary to generate the correct peak ac voltage. If the dv/dt as the supply passes through zero is low, failure is assumed, and a warning signal is generated before the half cycle is complete. This provides a useful extra few milliseconds of warning.
FIG. 6 a shows a simulated line brownout characteristic, in which the applied sine-wave input suffers a sudden reduction in voltage on the second cycle.
When the rectified waveform is compared to a reference voltage, the change in supply voltage shows up as an increase in the time $t taken for the rectified voltage to exceed the reference value. This change can be used to indicate a probable failure before the full half cycle has been established. This method gives the earliest possible warning of power brownout or failure. FIG. 6b shows a suitable circuit.
This circuit operates as follows. The line input is bridge-rectified by diodes D1 through D4. A divider network of resistors R1, R2, and R3 is placed across the bridge output, and this load ensures a clean rectified half-cycle waveform at point A, as shown in FIG. 6a.
This waveform is applied to the input of the comparator amplifier of PZ1 by the network R1, R2, and R3. As the supply voltage at A passes through 50V during the falling second half of a half cycle, the voltage applied to PZ1 passes through 2.5 V and the shunt regulator PZ1 and optical coupler OC1 will turn off.
This starts a timing sequence on C2 such that unless the supply voltage rises through 50 V once again during the next positive-going edge of a half cycle within a prescribed time, then PZ2 and Q1 are turned on, giving a power failure signal.
FIG. 6 (a) "Brownout" ac line voltage waveforms, showing "optimum
speed" circuit action.
(b) "Optimum speed" power failure warning circuit for direct
operation from ac line inputs.
The timing is defined by C2, R5, and the secondary voltage (5 V in this example). During each half cycle, OC1 turns off and C2 will be charged from the time the input sup ply falls below 50 V to the time it returns above 50 V. If the "off " time of OC1 gets longer (as would be the case for a low input voltage, as shown in FIG. 6a), the voltage ramp across C2 will exceed 2.5 V, and PZ2 will be turned on. Q1 then indicates a power failure.
An optocoupler is incorporated to isolate the sensing circuit from the output signal.
In this circuit the operating voltage is well defined. It may be adjusted so that a failure will be indicated only for line voltage variations that fall below the critical value required to provide the power supply holdup time.
The circuit is very fast and will give a brownout power failure warning within 1 to 8 ms, depending on where in a cycle a failure occurs.
8 QUIZ
1. Explain the purpose of a power failure warning circuit.
2. How is a power failure warning signal developed in a flyback switchmode supply?
3. What is meant by brownout power failure warning?
4. Describe the principle employed in a fast power failure warning circuit.
Also see: Our other Switching Power Supply Guide