Functions / Requirements of Direct-Off-Line SMPS -- CROSS CONDUCTION

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1 INTRODUCTION

The term "cross conduction" is used to describe a potentially damaging condition that can arise in half-bridge and full-bridge push-pull converters.

The problem is best explained with reference to the circuit shown in FIG. 1. It can be clearly seen that in this half-bridge configuration, if Q1 and Q2 are both turned on at the same time, they will provide a direct short circuit across the supply lines (transformers T1 and T2 are current transformers and have little resistance). This will often result in immediate failure, as a result of the damagingly high currents that will flow in the switching devices.

Clearly the transistors would not normally be driven such that they would both be on at the same time. The cause of cross conduction can be traced to excessive storage time in the switching transistors. FIG. 2 shows typical base drive and collector-current waveforms for the two half-bridge transistors Q1 and Q2 under square-wave (100% duty cycle), full-conduction conditions. As may be expected, because of the storage time t1-t3, cross conduction occurs.

In the top waveform, the base drive to Q1 is shown being removed at time t1 (the beginning of the "off" period for Q1 and the "on" period for Q2). However, because of the inevitable storage time of transistor Q1, its collector current is not blocked until a somewhat later time t3. At the same time, the lower transistor Q2 is turning on, as shown in the lower waveform. In bipolar transistors, the turn-on delay is typically less than the storage time; hence, with a full 100% duty cycle (push-pull base drive), there will be a short period (t2 to t3) when both devices will be conducting. Since these are directly across the supply lines, the low source impedance allows very large collector currents to flow. This effect is shown as current spikes on the waveforms for Q1 and Q2 in FIG. 2.

If the source impedance of the supply lines is very low, and no series current limiting is provided, damagingly large cross-conduction currents will flow through Q1 and Q2 under the above conditions, and the excessive stress may cause failure of the transistors.


FIG. 1 Basic half-bridge circuit.


FIG. 2 Typical cross-conduction current waveforms.

2 PREVENTING CROSS CONDUCTION

Traditionally, the method used to prevent cross conduction is to provide a "dead" time (both transistors off), between alternate on drive pulses. This "dead time" must be of sufficient duration to ensure that the "on" states of the two power transistors do not overlap under any conditions.

Unfortunately, there is considerable variation in the storage times of apparently similar devices. Also, the storage time is a function of temperature, drive circuit, and collector current loading. Hence, to ensure an adequate safety margin, the "dead time" will need to be considerable, and this will reduce the efficiency and the range of pulse-width control.

Clearly, a system that permits 100% pulse width without any risk of cross conduction would be preferred. The dynamic control provided by the cross-coupled inhibit technique described below admirably meets this requirement.


FIG. 3 Example of a cross-coupled cross-conduction inhibit circuit.

3 CROSS-COUPLED INHIBIT

FIG. 3 shows the basic elements of a dynamic cross-coupled, cross-conduction inhibit technique, applied in this example to a push-pull converter.

In a similar way as in the previous example, if, in the push-pull converter, transistors Q1 and Q2 are turned on at the same instant, the primary winding of the transformer T2 will be short-circuited and very large collector currents will flow in the transistors, probably with catastrophic results.

In FIG. 3, cross conduction is prevented by the AND gates U2 and U3. (These gates are often part of the main control IC.) The circuit is shown operating with full duty cycle square-wave base drive. Previously, this would result in severe cross-conduction problem. However, in this circuit, cross conduction is prevented by the cross-coupled inhibit input to the gates, provided by resistors R3 or R4 (depending on the state of conduction Q1 and Q2).

4 CIRCUIT OPERATION

Consider Figs. 2 and 3 for the initial condition when Q2 is just about to turn on (point t1 in the drive waveform). At this instant, input 1 of gate U3 is enabled for an "on" state of Q2. However, as a result of its storage time, Q1 will still be conducting and its collector voltage will be low. Hence, input 2 of U3 will be low. As a result of the gating action of U3, the turn-on of Q2 is delayed until the voltage on the collector of Q1 goes high. This does not occur until the end of its storage period, when Q1 turns fully off. As a result, cross conduction is actively prevented; Q2 turns on only after Q1 has fully turned off. The same action occurs when the drive is applied to U2, except that in this case the turn-on of Q1 is delayed until Q2 turns off.

It should be noted that this gating action is self-adjusting and will accommodate variations in the storage times of the two switching devices. Being dynamic, it always permits full conduction angle, while entirely eliminating the possibility of cross conduction.

In principle, the same technique can be applied to the half-bridge and full-bridge converters, although the drive circuits are somewhat more complex, as the switching devices do not share a common line.

Because the collector voltage swing of Q1 and Q2 would normally exceed the voltage rating of the control circuit, some form of voltage clamping is normally required. In this example, zener diodes ZD1 and ZD2 provide the required clamping action.

Not all control ICs provide the necessary inhibit inputs. In this case, the function may be provided externally to the IC; otherwise a dead band must be provided.

The major advantage of the cross-coupled inhibit technique is that it extends the pulse width control range from zero to 100%, while maintaining complete integrity as far as cross-conduction problems are concerned. Its advantages should not be overlooked.

5 QUIZ

1. Explain the meaning of the term "cross conduction" as applied to half-bridge, full bridge, and push-pull converters.

2. Describe a method used to reduce the possibility of cross conduction in push-pull converters.

3. What is the disadvantage of the "dead time" approach to preventing cross conduction?

4. Describe a method of preventing cross conduction that does not rely on a built-in dead time.

Also see: Our other Switching Power Supply Guide

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