AMAZON multi-meters discounts AMAZON oscilloscope discounts
|
|
1 INTRODUCTION
During fault conditions, most power supplies have the potential to deliver higher output voltages than those normally specified or required. In unprotected equipment, it is possible for output voltages to be high enough to cause internal or external equipment damage. To protect the equipment under these abnormal conditions, it is common practice to provide some means of overvoltage protection within the power supply.
Because TTL and other logic circuits are very vulnerable to overvoltages, it is industry standard practice to provide overvoltage protection on these outputs. Protection for other output voltages is usually provided as an optional extra, to be specified if required by the systems engineer (user).
2 TYPES OF OVERVOLTAGE PROTECTION
Overvoltage protection techniques fall broadly into three categories: Type 1, simple SCR "crowbar" overvoltage protection Type 2, overvoltage protection by voltage clamping techniques Type 3, overvoltage protection by voltage limiting techniques The technique chosen will depend on the power supply topology, required performance, and cost.
3 TYPE 1, SCR "CROWBAR" OVERVOLTAGE PROTECTION
As the name implies, "crowbar" overvoltage protection short-circuits the offending power supply output in response to an overvoltage condition on that output. The short circuiting device, usually an SCR, is activated when the overvoltage stress exceeds a preset limit for a defined time period. When the SCR is activated, it short-circuits the output of the power supply to the common return line, thus collapsing the output volt age. A typical simple SCR "crowbar" overvoltage protection circuit connected to the output of a linear regulator is shown in FIG. 1a. It is important to appreciate that under fault conditions, the SCR "crowbar" shunt action does not necessarily provide good long-term protection of the load. Either the shunt device must be sufficiently powerful to sustain the short-circuit current condition for extended periods, or some external current limit, fuse, or circuit breaker must be actuated to remove the stress from the SCR.
With linear regulator-type DC power supplies, SCR "crowbar" overvoltage protection is the normal protection method, and the simple circuit shown in FIG. 1a is often used.
The linear regulator and "crowbar" operate as follows: The unregulated DC header voltage VH is reduced by a series transistor Q1 to provide a lower, regulated output voltage Vout. Amplifier A1 and resistors R1 and R2 provide the regulator voltage control, and transistor Q2 and current limiting resistor R1 provide the current limit protection.
FIG. 1 (a) SCR "crowbar" overvoltage protection circuit, applied
to a simple linear regulator. (b) A more precise SCR "crowbar" protection
circuit using a voltage comparator IC. (c) A specialized control IC driving
an SCR "crowbar".
FIG. 1 (d) Typical performance characteristic of a delayed "crowbar" circuit.
(e) Typical zener diode characteristic.
The most catastrophic failure condition would be a short circuit of the series regulating device Q1, so that the higher unregulated header voltage VH is now presented to the output terminals. Under such fault conditions, both voltage control and current limit actions are lost, and the "crowbar" SCR must be activated to short-circuit the output terminals.
In response to an overvoltage fault, the "crowbar" circuit responds as follows: As the voltage across the output terminals rises above the "crowbar" actuation voltage, zener diode ZD1 conducts driving current via R4 into the SCR gate delay capacitor C1. After a short delay period defined by the values of C1, R4 and the applied voltage, C1 will have charged to the gate firing voltage (0.6 V), and the SCR will conduct to short-circuit the output terminals via the low-value limiting resistor R5. However, a large current now flows from the unregulated DC input through the shunt-connected "crowbar" SCR. To prevent over-dissipation in the SCR, it is normal, in linear regulators, to fit a fuse FS1 or circuit breaker in the unregulated DC supply. If the series regulator device Q1 has failed, the fuse or circuit breaker now clears, to disconnect the prime source from the output before the "crowbar" SCR is destroyed.
The design conditions for such a system are well defined. It is simply necessary to select an SCR "crowbar" or other shunt device that is guaranteed to survive the fuse or circuit breaker's "let-through" energy. With SCRs and fuses, this "let-through" energy is normally defined in terms of the I^2 t product, where I is the fault current and t the fuse or breaker clearance time.
Crowbar protection is often preferred and hence specified by the systems engineer because it is assumed to provide full protection (even for externally caused overvoltage conditions). However, full protection may not always be provided, and the systems engineer should be aware of possible anomalous conditions.
In standard, "off-the-shelf" power supply designs, the crowbar SCR is chosen to protect the load from internal power supply faults. In most such cases, the maximum let-through energy under fault conditions has been defined by a suitably selected internal fuse. The power supply and load are thus 100% protected for internal fault conditions. However, in a complete power supply system, there may be external sources of power, which may become connected to the terminals of the SCR-protected power supply as a result of some system fault. Clearly, the fault current under these conditions can exceed the rating of the "crowbar" protection device, and the device may fail (open circuit), allowing the overvoltage condition to be presented to the load.
Such external fault loading conditions cannot be anticipated by the power supply designer, and it is the responsibility of the systems engineer (user) to specify the worst-case fault condition so that suitable "crowbar" protection devices can be provided.
4 "CROWBAR" PERFORMANCE
More precise "crowbar" protection circuits are shown in FIG. 1b and c. The type of circuit selected depends on the performance required. In the simple "crowbar," there is always a compromise choice to be made between ideal fast protection (with its tendency toward nuisance operation) and delayed operation (with its potential for voltage overshoot during the delay period).
For optimum protection, a fast-acting, non-delayed overvoltage "crowbar" is required.
This should have an actuation voltage level that just exceeds the normal power supply output voltage. However, a simple fast-acting "crowbar" of this type will often give many "nuisance" operations, since it will respond to the slightest transient on the output lines. For example, a sudden reduction in the load on a normal linear regulator will result in some out put voltage overshoot. (The magnitude of the overshoot depends on the transient response of the power supply and the size of the transient load.) With a very fast acting "crowbar," this common transient overvoltage condition can result in unnecessary "crowbar" operation and shutdown of the power supply. (The current limiting circuit would normally limit the fault current in this type of nuisance operation, so it usually would only require a power on-off recycling to restore the output.) To minimize such nuisance shutdowns, it is normal practice to provide a higher trip voltage and some delay time. Hence, in the simple "crow bar" circuit, a compromise choice must be made among operating voltage, delay time, and required protection.
FIG. 1d1 shows the response of a typical delayed "crowbar" to an overvoltage fault condition in a linear regulator. In this example, the regulator transistor Q1 has failed to a short circuit at instant t1. In this failure mode, the output voltage is rapidly increasing from the normal regulated terminal voltage V0 toward the unregulated header voltage VH at a rate defined by the loop inductance, the source resistance, and the size of the output capacitors C0. The crowbar has been set to operate at 5.5 V, which occurs at instant t2; however, because of the crowbar delay (t2 to t3) of 30 µs (typical values), there is a voltage over-shoot. In the example shown, the rate of change of voltage on the output terminals is such that the crowbar operates before the output voltage has reached 6 V. At this time the output voltage is clamped to a low value Vc during the clearance time of the fuse (t3 to t4), at which time the voltage falls to zero. Hence, full protection of an external IC load would be provided.
In this example the SCR delay time was selected to be compatible with the 20-µs transient response typical of a linear regulator. Although this delay will prevent nuisance shut downs, it is clear that if the maximum output voltage during the delay period is not to exceed the load rating (normally 6.25 for 5-V ICs), then the maximum dv/dt (rate of change of output voltage under fault conditions) must be specified. The power supply designer should examine the failure mode, because with small output capacitors and low fault source resistance, the dv/dt requirements may not be satisfied. Fortunately the source resistance need is often met by the inevitable resistance of the transformer, rectifier diodes, current sense resistors, and series fuse element.
5 LIMITATIONS OF "SIMPLE" CROWBAR CIRCUITS
The well-known simple crowbar circuit shown in FIG. 1a is popular for many non critical applications. Although this circuit has the advantages of low cost and circuit simplicity, it has an ill-defined operating voltage, which can cause large operating spreads.
It is sensitive to component parameters, such as temperature coefficient and tolerance spreads in the zener diode, and variations in the gate-cathode operating voltage of the SCR. Furthermore, the delay time provided by C1 is also variable, depending upon the overvoltage stress value, the parameters of the series zener diode ZD1, and the SCR gate voltage spreads.
When an overvoltage condition occurs, the zener diode conducts via R4, to charge C1 toward the SCR gate firing voltage. The time constant of this charge action is a function of the slope resistance of ZD1. This is defined by the device parameters and the current flowing in ZD1, which is a function of the applied stress voltage. Hence, the slope resistance of ZD1 quite variable, giving large spreads in the operating delay of the SCR. The only saving grace in this circuit is that the delay time tends to be reduced as the overvoltage stress condition increases. Resistor R1 is fitted to ensure that the zener diode will be biased into its linear region at voltages below the gate firing voltage to assist in the definition of the output actuating voltage. A suitable bias point is shown on the characteristics of the zener diode in FIG. 1e.
A much better arrangement is shown in FIG. 1b. In this circuit a precision reference is developed by integrated circuit reference ZD2 (TL 431 in this example). This, together with comparator amplifier IC1 and the voltage divider network R2, R3, defines the operating voltage for the SCR. In this arrangement, the operating voltage is well defined and independent of the SCR gate voltage variations. Also, R4 can have a much larger resistance, and the delay (time constant R4, C1) is also well defined. Because the maximum amplifier output voltage increases with applied voltage, the advantage of reduced delay at high overvoltage stress conditions is retained. This second technique is therefore recommended for more critical applications.
Several dedicated overvoltage control ICs are also available; a typical example is shown in FIG. 1c. Take care to choose an IC specifically designed for this requirement, as some voltage control ICs will not operate correctly during the power-up transient (just when they may be most needed).
6 TYPE 2, OVERVOLTAGE CLAMPING TECHNIQUES
In low-power applications, overvoltage protection may be provided by a simple clamp action. In many cases a shunt-connected zener diode is sufficient to provide the required overvoltage protection. (See FIG. 2a.) If a higher current capability is required, a more powerful transistor shunt regulator may be used. FIG. 2b shows a typical circuit.
FIG. 2 Shunt regulator-type voltage clamp circuits.
It should be remembered that when a voltage clamping device is employed, it is highly dissipative, and the source resistance must limit the current to acceptable levels.
Hence, shunt clamping action can be used only where the source resistance (under failure conditions) is well defined and large. In many cases shunt protection of this type relies on the action of a separate current or power limiting circuit for its protective performance.
An advantage of the clamp technique is that there is no delay in the voltage clamp action, and the circuit does not require resetting upon removal of the stress condition. Very often, overvoltage protection by clamp action is better fitted at the load end of the supply lines. In this position it becomes part of the load system design.
7 OVERVOLTAGE CLAMPING WITH SCR "CROWBAR" BACKUP
It is possible to combine the advantages of the fast-acting voltage clamp with the more powerful SCR crowbar. With this combination, the delay required to prevent spurious operation of the SCR will not compromise the protection of the load, as the clamp circuit will provide protection during this delay period.
For lower-power applications, the simple expedient of combining a delayed crowbar as shown in FIG. 1a with a parallel zener clamp diode ( FIG. 2a) will suffice.
In more critical high-current applications, simple zener clamp techniques would be excessively dissipative, but without voltage clamping the inevitable voltage overshoot caused by the delay in the simple crowbar overvoltage protection circuit would be unacceptable. Furthermore, nuisance shutdowns caused by fast-acting crowbars would also be undesirable.
For such critical applications, a more complex protection system can be justified.
The combination of an active voltage clamp circuit and an SCR crowbar circuit with self-adjustable delay can provide optimum performance, by eliminating nuisance shut downs and preventing voltage overshoot during the SCR delay period. The delay time is arranged to reduce when the stress is large to prevent excessive dissipation during the clamping period. ( FIG. 3a shows a suitable circuit, and FIG. 3b the operating parameters.)
In the circuit shown in FIG. 3a, the input voltage is constantly monitored by comparator amplifier A1, which compares the internal reference voltage ZD1 with the input voltage (Vout power supply), using the divider chain R1, R2. (Voltage adjustment is pro vided by resistor R1.) In the event of an overvoltage stress, A1 increases and the output of A1 goes high; current then flows in the network R4, ZD2, Q1 base-emitter, and R6. This current turns on the clamp transistor Q1.
Q1 now acts as a shunt regulator and tries to maintain the terminal voltage at the clamp value by shunting away sufficient current to achieve this requirement. During this clamping action, zener diode ZD2 is polarized, and point A voltage increases by an amount defined by the zener diode voltage, the base-emitter voltage of Q1, and a further voltage defined by the clamp current flowing in R6. This total voltage is applied to the SCR via the series network R7, C1, R8 such that C1 will be charging toward the gate firing voltage of the SCR. If the overvoltage stress condition continues for a sufficient period, C1 will charge to 0.6 V, and SCR1 will fire to short-circuit the supply to the common line. (Resistor R9 limits the peak current in SCR1.)
The performance parameters of this circuit are shown in FIG. 3b. For a limited stress condition, trace A will be produced as follows: At time t1 an overvoltage fault condition occurs and the voltage rises to the voltage clamp point Vovp. At this point, Q1 conducts to shunt away sufficient current to maintain the voltage constant at Vovp until time t4. At this instant, SCR1 is fired, to reduce the output voltage to a low value defined by the SCR saturation voltage. At time t5 the external fuse or circuit breaker operates to disconnect the supply. It is clear from this diagram that if the clamping action were not provided, the voltage could have risen to an unacceptably high value during the delay period as a result of the long delay and the rapidly rising edge on the stress voltage condition.
FIG. 3 (a) OVP combination circuit, showing an active voltage clamp
combined with an SCR crowbar. (b) Operating characteristics for the OVP
combination circuit shown in (a).
If the current flowing in Q1 during a clamping period is large, the voltage across emitter resistor R6 will rapidly increase, increasing the voltage at point A. As a result, the delay time for SCR1 will be reduced to t3, and the shorter delay reduces the stress and overvoltage excursion on Q1. This is depicted by trace B in FIG. 3b.
Finally, for highly stressful conditions where the current during the clamping period is very large, the voltage across R6 will be high enough to bring zener diode ZD3 into conduction, bypassing the normal delay network. SCR1 will operate almost immediately at t2, shutting down the supply. This is shown by trace C in the diagram.
This circuit provides the ultimate in overvoltage protection, minimizing nuisance shut downs by providing maximum delay for small, low-stress overvoltage transient conditions.
The delay time is progressively reduced as the overvoltage stress becomes larger, and for a genuine failure, very little delay and overshoot is allowed. This technique should be considered as part of an overall system strategy, and the components selected to satisfy the maximum stress conditions.
8 SELECTING FUSES FOR SCR "CROWBAR" OVERVOLTAGE PROTECTION CIRCUITS
In the event of an overvoltage stress condition caused by the failure of the series regulator in a linear power supply, the "crowbar" SCR will be required to conduct and clear the stress condition by blowing the series protection fuse. Hence, the designer must be confident that the fuse will open and clear the faulty circuit before the SCR is destroyed by the fault current.
If a large amount of energy is absorbed in the junction of the SCR within a short period, the resultant heat cannot be conducted away fast enough. As a result, an excessive temperature rise occurs, and thermal failure soon follows. Hence, the failure mechanism is not simply one of total energy but is linked to the time period during which the energy is dissipated.
For periods below 10 ms, very little of the energy absorbed at the junction interface will be conducted away to the surrounding package or heat sink. Consequently, for a very short transient stress, the maximum energy limit depends on the mass of the junction; this is nearly constant for a particular device. For SCRs, this energy limit is normally specified as a 10-ms I^2t rating. For longer-duration lower-stress conditions, some of the heat energy will be conducted away from the junction, increasing the I^2t rating.
In the SCR, the energy absorbed in the junction is more correctly (I^2Rj VdI )t joules, where Rj is the junction slope resistance and Vd is the diode voltage drop. However, at high currents, I^2 Rj losses predominate, and since the slope resistance Rj tends to be a constant for a particular device, the failure energy tends to KI^2 t.
The same general rules as were considered for the SCR failure mechanism apply to the fuse clearance mechanism. For very short time periods (less than 10 ms), very little of the energy absorbed within the fuse element will be conducted away to the case, the fuse clips, or the surrounding medium (air, sand, etc.). Once again, the fusing energy tends to be constant for short periods, and this is defined in terms of the 10-ms I^2t rating for the fuse.
For longer-duration lower-stress conditions, some of the heat energy will be conducted away, increasing the I^2t rating. FIG. 5.1 shows how the I^2t rating of a typical fast fuse changes with stress duration.
Modern fuse technology is very sophisticated. The performance of the fuse can be modified considerably by its design. Fuses with the same long-term fusing current can behave entirely differently for short transient conditions. For motor starting and other high-inrush loading requirements, "slow-blow" fuses are chosen. These fuses are designed with relatively large thermal mass fuse elements that can absorb considerable energy in the short term without fuse rupture. Hence they have very high I^2 t ratings compared with their longer-term current ratings.
At the other end of the scale, fast semiconductor fuses have very low fuse element mass.
These fuses are often filled with sand or alumina so that the heat generated by normal loading currents can be conducted away from the low-mass fuse element, giving higher long-term current ratings. As previously explained, in the short term, the heat conduction effects are negligible, and very small amounts of total energy, if dissipated rapidly within the fuse element, are sufficient to cause fuse rupture. Such fuses have very low I^2 t ratings compared with their longer-term current ratings, and will more effectively protect the SCR and the external load.
FIG. 5.1 shows examples of the clearance current-time characteristics for typical "slow-blow," "normal-blow," and "fast-blow" fuses. It should be noted that although the long-term fusing current is 10 A in all cases, the short-term I^2 t ratings range from 42 at 10 ms for the fast fuse to over 6000 at 100 ms for the slow fuse. Since the "crowbar" SCR I^2 t rating must exceed the fuse I^2 t rating, it is clearly important to select both with care. It is also important to remember that the output capacitor in the power supply must be discharged by the crowbar SCR and is not within the fused part of the loop. Since the maximum current and di/dt of the SCR must also be satisfied, it is often necessary to fit a series limiting inductor or resistor in the anode of the SCR.
The I2 t rating of the SCR must include sufficient margin to absorb the energy ½CV^2 stored in the output capacitor, in addition to the fuse let-through energy. Finally, the possibility of a short circuit to other sources of energy external to the supply must be considered when selecting SCR ratings.
It has been assumed in this example that the fuse is in a noninductive low-voltage loop.
Hence the example has considered only the pre-arcing or melting energy.
In high-voltage circuits or loops with high inductance, an arc will be drawn during clearance of the fuse element, increasing the I^2 t let-through energy. This effect must be considered when selecting the fuse and SCR.
9 TYPE 3, OVERVOLTAGE PROTECTION BY VOLTAGE LIMITING TECHNIQUES
In switchmode power supplies, the crowbar or clamp voltage protection techniques tend to be somewhat less favored because of their relatively large size and dissipation.
By its nature, the off-line switchmode power supply tends to "fail safe"-that is, to a zero or low-voltage condition. Most failure modes result in zero output voltage. Since the high-frequency transformer provides galvanic isolation between the input supply and the output lines, the need for crowbar-type overvoltage protection is considerably less than would be the case with the linear regulator. Hence, in switchmode supplies, overvoltage protection by converter voltage limiting or shutdown is more usually provided. Normally an independent voltage control circuit is energized if the main voltage control loop fails. (A possible exception to this would be the DC-to-DC switchmode regulator, where galvanic isolation may not be provided.) Many types of converter voltage limiting circuits are used; FIG. 4 shows a typical example. In this circuit, a separate optocoupler is energized in the event of an overvoltage condition. This triggers a small-signal SCR on the primary circuit to switch off the primary converter. The main criterion for such protection is that the protection loop should be entirely independent of the main voltage control loop. Unfortunately, this requirement is often violated; for example, a separate amplifier within the same voltage control IC package would not be acceptable as a control amplifier in the overvoltage control loop.
The normal criterion is that the system should not produce an overvoltage for any single component failure. In the previous example, this criterion is violated because if the IC were to fail, both control and protection amplifiers would be lost and overvoltage protection would not be provided.
Voltage limiting circuitry may either latch, requiring a cycling of the supply input to reset, or be self-recovering, depending on application requirements. For example, the circuit shown in FIG. 4 may be made self-recovering by replacing SCR2 with a clamp transistor. Voltage limiting circuits come in many forms and must be configured to suit the overall circuit topology. In multiple-output applications, where independent secondary cur rent limits or regulators are provided, the voltage limit circuit may act upon the current limit circuit to provide the overvoltage protection. Once again, the usual criterion is that a single component failure should not result in an overvoltage condition. Many techniques are used, and it is beyond the scope of this guide to cover more than the bare essentials.
FIG. 4 Typical overvoltage shutdown protection circuit for SMPS.
This circuit operates on the control circuit of the switchmode supply
to shut down the converter during an overvoltage stress.
10 QUIZ
1. Why is output overvoltage protection often considered necessary?
2. Name three types of overvoltage protection in common use.
3. Explain where the three types of overvoltage protection may be used.
4. What is the industry standard criterion for the reliability of overvoltage-protected circuits?
5. Describe what is meant by crowbar overvoltage protection.
6. Describe the problems normally encountered with a fast-acting crowbar protection circuit.
7. List the disadvantages and advantages of a delayed overvoltage protection circuit.
8. What can be done to reduce the problems of the delayed overvoltage protection circuit while retaining the advantages?
9. Explain the important criteria in fuse selection for SCR crowbar applications.
Also see: Our other Switching Power Supply Guide